1. Technical Field
The present disclosure generally relates to the field of semiconductors, and more particularly to method of manufacturing an embedded split-gate flash memory device.
2. Description of the Related Art
Embedded split-gate flash memory devices are commonly used in integrated circuits. An embedded split-gate flash memory device may include a semiconductor substrate comprising a flash memory region and a logic region, a silicon oxide layer formed on the flash memory region, a floating gate formed on the silicon oxide layer, an insulating layer formed on the floating gate, and a control gate formed on the insulating layer. The floating gate may be formed of polysilicon.
An embedded split-gate flash memory is a type of voltage-controlled device, and its write/erase functions are based on tunneling effect. Specifically, current in the embedded split-gate flash memory flows through the silicon oxide layer between the floating gate and the semiconductor substrate. The floating gate is then charged so as to write data, or discharged so as to erase data.
Presently, in most embedded split-gate flash memory manufacturing process flows, the floating gate polysilicon is deposited after shallow trench isolation (STI) formation. Chemical-Mechanical Polishing (CMP) is then performed to planarize the floating gate polysilicon in both the logic region and the flash memory region. However, it is often difficult to achieve CMP uniformity due to the difference in pattern density between the logic region and the flash memory region. After CMP on the floating gate polysilicon has been completed, deposition and etch processes are then carded out to form the control gate and floating gate and corresponding sidewalls. However, since the floating gate polysilicon in the logic region is much thicker than the floating gate polysilicon in the flash memory region (due to uneven CMP), numerous cone defects may be generated after the etch processes. As a result, the non-uniformity in the CMP process and the etch defects may lead to manufacturing yield losses.